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| ADVANCED LINEAR DEVICES, INC. ALD110800/ALD110800A/ALD110900/ALD110900A VGS(th)= +0.0V e TM EPAD EN (R) AB LE D QUAD/DUAL N-CHANNEL ZERO THRESHOLDTM EPAD(R) MATCHED PAIR MOSFET ARRAY GENERAL DESCRIPTION ALD110800A/ALD110800/ALD110900A/ALD110900 are monolithic quad/dual N-Channel MOSFETs matched at the factory using ALD's proven EPAD(R) CMOS technology. These devices are intended for low voltage, small signal applications. The ALD110800/ALD110900 features zero threshold voltage, which reduces or eliminates input to output voltage level shift, including circuits where the signal is referenced to GND or V+. This feature greatly reduces output signal voltage level shift and enhances signal operating range, especially for very low operating voltage environments. With these zero threshold devices an analog circuit with multiple stages can be constructed to operate at extremely low supply or bias voltage levels. As an example, an input amplifier stage operating at 0.2V supply voltage has been demonstrated. ALD110800A/ALD110800/ALD110900A/ALD110900 matched pair MOSFETs are designed for exceptional device electrical characteristics matching. As these devices are on the same monolithic chip, they also exhibit excellent tempco tracking characteristics. They are versatile as design components for a broad range of analog applications such as basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications. Besides matched pair electrical characteristics, each individual MOSFET also exhibits well controlled parameters, enabling the user to depend on tight design limits. Even units from different batches and different date of manufacture have correspondingly well matched characteristics. These devices are built for minimum offset voltage and differential thermal response, and they are designed for switching and amplifying applications in +0.2V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired. The VGS(th) of these devices are set at +0.0V, which classify them as both enhancement mode and depletion mode devices. When the gate is set at 0.0V, the drain current = +1A @ VDS =1+0.1V, which allow a class of circuits with output voltage level biased at or near input voltage level without voltage level shift. These devices exhibit same well controlled turn-off and sub-threshold characteristics as standard enhancement mode MOSFETs. The ALD110800A/ALD110800/ALD110900A/ALD110900 are MOSFET devices that feature high input impedance (1012) and high DC current gain (>108 ). A sample calculation of the DC current gain at a drain current of 3mA and input leakage current of 30pA at 25C is = 3mA/ 30pA = 100,000,000. For most applications, connect V+ pin to the most positive voltage potential (or left open unused) and V- and N/C pins to the most negative voltage potential in the system. All other pins must have voltages within these voltage limits. ORDERING INFORMATION Operating Temperature Range* 0C to +70C 0C to +70C 16-Pin Plastic Dip Package ALD110800APC ALD110800PC 16-Pin SOIC Package 8-Pin Plastic Dip Package 8-Pin SOIC Package N/C* FEATURES * Precision zero threshold voltage mode * Nominal RDS(ON) @VGS=0.0V of 104K * Matched MOSFET to MOSFET characteristics * Tight lot to lot parametric control * VGS(th) match (VOS) to 2mV and 10mV * Positive, zero, and negative VGS(th) tempco * Low input capacitance * Low input/output leakage currents APPLICATIONS * Very low voltage analog and digital circuits * Zero power fail safe circuits * Backup battery circuits & power failure detector * Low level voltage clamp & zero crossing detector * Source followers and buffers * Precision current mirrors and current sources * Capacitives probes and sensor interfaces * Charge detectors and charge integrators * Differential amplifier input stage * High side switches * Peak detectors and level shifters * Sample and Hold * Current multipliers * Analog switches / multiplexers * Voltage comparators and level shifters PIN CONFIGURATION ALD110800 N/C* GN1 DN1 S12 VDN4 GN4 N/C* 1 2 3 4 5 6 7 8 VPC, SC PACKAGES M1 M2 V- V- 16 15 14 N/C* GN2 DN2 V+ S34 DN3 GN3 N/C* V+ VM4 M3 13 12 11 10 9 V- ALD110900 VV- 1 2 3 4 8 7 N/C* GN1 DN1 S12 GN2 DN2 V- M1 M2 6 V5 ALD110800ASC ALD110900APA ALD110900ASA ALD110800SC ALD110900PA ALD110900SA * Contact factory for industrial temp. range or user-specified threshold voltage values PA, SA PACKAGES *N/C pins are internally connected. Connect to V- to reduce noise Rev 1.0-0506 (c)2005 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286 www.aldinc.com ABSOLUTE MAXIMUM RATINGS Drain-Source voltage, VDS Gate-Source voltage, VGS Power dissipation Operating temperature range PA, SA, PC, SC package Storage temperature range Lead temperature, 10 seconds 10.6V 10.6V 500 mW 0C to +70C -65C to +150C +260C OPERATING ELECTRICAL CHARACTERISTICS V+ = +5V (or open) V- = GND TA = 25C unless otherwise specified CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment. ALD110800A / ALD110900A Parameter Gate Threshold Voltage Offset Voltage VGS(th)1-VGS(th)2 Offset Voltage Tempco GateThreshold Voltage Tempco Symbol VGS(th) VOS TCVOS TCVGS(th) Min -0.01 Typ 0.00 1 Max 0.01 2 ALD110800/ ALD110900 Min -0.02 Typ 0.00 2 Max 0.02 10 Unit V mV Test Conditions IDS =1A, VDS = 0.1V 5 -1.7 0.0 +1.6 12.0 3.0 1.4 5 -1.7 0.0 +1.6 12.0 3.0 1.4 V/C mV/C VDS1 = VDS2 ID = 1A, VDS = 0.1V ID = 20A, VDS = 0.1V ID = 40A, VDS = 0.1V VGS = +9.5V, VDS = +5V VGS = +4.0V, VDS = +5V VGS = +4.0V VDS = +9.0V On Drain Current IDS (ON) GFS mA Forward Transconductance mmho Transconductance Mismatch Output Conductance GFS GOS RDS (ON) 1.8 68 1.8 68 % mho VGS = +4.0V VDS = +9.0V VDS = +0.1V VGS = +4.0V VDS = +0.1V VGS = +0.0V VDS = +0.1V VGS = +4.0V Drain Source On Resistance 500 500 Drain Source On Resistance RDS (ON) 104 104 K Drain Source On Resistance Tolerance Drain Source On Resistance Mismatch Drain Source Breakdown Voltage Drain Source Leakage Current1 RDS (ON) 5 5 % RDS (ON) BVDSX IDS (OFF) 10 0.5 0.5 % 10 V IDS = 1.0A V-= VGS = -1.0V VGS = -1.0V, VDS =+5V V- = -5V TA = 125C VDS = 0V VGS = +10V TA =125C 10 400 4 10 400 4 pA nA pA nA pF pF ns ns dB Gate Leakage Current1 IGSS CISS CRSS ton toff 5 30 1 5 30 1 Input Capacitance Transfer Reverse Capacitance Turn-on Delay Time Turn-off Delay Time Crosstalk Notes: 1 2.5 0.1 10 10 60 2.5 0.1 10 10 60 V+ = 5V RL= 5K V+ = 5V RL= 5K f = 100KHz Consists of junction leakage currents ALD110800/ALD110800A/ALD110900/ALD110900A Advanced Linear Devices 2 |
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